FTDI FT232HL DRIVER

Sign up using Facebook. I’ve tried other length , , etc no change. This is what it looked like on my logic analyzer when I output 6 bytes at once at a clock rate of 5MHz. Back in the early days before people understood the issues, adding a USB serial converter to something that worked fine on a local bus serial port could completely break its usability. I’m still surprised some people can reach high transfer speeds out of the box and using the provided lib.

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Here is the configuration used: Home Questions Tags Users Unanswered. By using our site, you acknowledge that you have read and understand our Cookie PolicyPrivacy Policyand our Terms of Service. Post Your Answer Discard By clicking “Post Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of the website is subject to these gt232hl.

Latency timer really shouldn’t matter because that is simply a timeout before USB will send an incomplete packet. However, between each byte, there is a 64uS delay so it means that no matter how high is ftdo SPI clock, the data transfer takes minutes instead of seconds. USB peripherals can slow to a crawl if they only get a byte or few moved per frame.

That delay between bytes is based on how long it takes the chip to move the next byte from its internal buffer to the output shift registers.

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FTDI FTH USB 12Mbps results – Black Mesa Labs

Also, I use master spi mode, write-only, there shouldn’t be any handshaking involved. I’ve used sample code provided with sample-dynamic.

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Here are some things to check. If this is a custom board design, or you bought a discount FTH adapter board, make sure it has the correct system clock frequency. That’s often now understood, but SPI can involve coordination with other signals like ft23h2l, so it’s easy to imagine being hobbled by bus framing and unable to leverage the theoretical data rate that would apply to larger transfers.

How are you delivering the data to the drivers? In what size chunks? I heard back from FTDI guys, they suggest I don’t use their ffdi but they didn’t clearly say that their lib was bugged.

If you make a single call, add the appropriate chip select enable and disable flags see below. I imagined maybe playing with the channelConf. If you make multiple calls, make sure to ft232gl the chip select flags to the first and last calls in the series.

I have it set tobut often for timing sensitive stuff, I have it lower fh232hl Try a slower clockrate first just to test and make sure the device is communicating correctly I assume you did, I’m just adding this in case someone else hasn’t tried that yet. Are you sure that USB side is sending data fast enough? I tried to recreate the problem you describe, but I wasn’t able to exactly.

There must be something to fix because there are numerous examples of people reaching high ttdi rates.

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Also, delay between bytes should be a setting somewhere. Why are you looking only at SPI side of your bridge?

I’ve tried other length, fgdi no change. This is what it looked like on my logic analyzer when I output 6 bytes at once at a clock rate of 5MHz. Back in the early days before people understood the issues, adding a USB serial converter to something that worked fine on a local bus serial port could completely break its usability. GCC Library and code from: By clicking fft232hl Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of the website is subject to these policies.

usb – FTHL FTDI consecutive SPI bytes delay problem – Electrical Engineering Stack Exchange

If the chip is clocked slowly, then this will show at the higher frequencies as a larger gap between bytes. I’m still surprised some people can reach high transfer speeds out of the box and using the provided lib. There is is a small delay between bytes, but nowhere near as large as 64us.

I have no idea how fast the USB transmit the data. Post as a guest Name. Here is the configuration used:.